CVE-2022-27813

moderate-risk
Published 2023-10-19

Motorola MTM5000 series firmwares lack properly configured memory protection of pages shared between the OMAP-L138 ARM and DSP cores. The SoC provides two memory protection units, MPU1 and MPU2, to enforce the trust boundary between the two cores. Since both units are left unconfigured by the firmwares, an adversary with control over either core can trivially gain code execution on the other, by overwriting code located in shared RAM or DDR2 memory regions.

Do I need to act?

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0.05% chance of exploitation
EPSS score — low exploit probability
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Not on CISA KEV list
No confirmed active exploitation reported to CISA
?
Patch status unknown
Check vendor advisories for fix availability and mitigation guidance
8
CVSS 8.1/10 High
LOCAL / LOW complexity

Affected Products (2)

Mtm5500 Firmware
Mtm5400 Firmware

Affected Vendors

References (2)

Technical Description https://tetraburst.com/
Technical Description https://tetraburst.com/
32
/ 100
moderate-risk
Severity 25/34 · High
Exploitability 0/34 · Minimal
Exposure 7/34 · Low