CWE-1332: Improper Handling of Faults that Lead to Instruction Skips
low-riskThe device is missing or incorrectly implements circuitry or sensors that detect and mitigate the skipping of security-critical CPU instructions when they occur.
Common Consequences
Detection Methods
This weakness can be found using automated static analysis once a developer has indicated which code paths are critical to protect.
This weakness can be found using automated dynamic analysis. Both emulation of a CPU with instruction skips, as well as RTL simulation of a CPU IP, can indicate parts of the code that are sensitive to faults due to instruction skips.
This weakness can be found using manual (static) analysis. The analyst has security objectives that are matched against the high-level code. This method is less precise than emulation, especially if the analysis is done at the higher level language rather than at assembly level.
Real-World Examples (3)
| CVE | CVSS | EPSS | KEV |
|---|---|---|---|
| CVE-2025-8028 | 9.8 | 0.2% | — |
| CVE-2024-20060 | 5.9 | 0.0% | — |
| CVE-2024-20059 | 6.7 | 0.0% | — |